In telecommunication network and data network switches, the serial link interface is located in the so-called device connecting means of the switch. The device connecting means include links between the switch core, multiplexors, and end devices.
It has been found desirable for such links to have the following properties:
line codes which guarantee changes between zeros and ones; PA1 a high balance probability between the number of zeros and the number of ones, so as to enable relatively simple transmission equipment to be used; PA1 space for additional information so as to be able to distinguish between different types of time slots, for instance, between time slots for circuit switched data and packet switch data, so as to enable memories which contain information concerning the types of respective time slots to be dispensed with; and PA1 the line code and the additional information may only marginally increase the rate.
U.S. Pat. No. 4,891,808 relates to time multiplex in the transmission of sampled data from a plurality of parallel input channels on a serial signal line and restoring the parallel data from the serial line. A synchronization marker is inserted directly into data for at least one given channel which shall be used as a marked or synchronization channel. The marker is arranged as an "impossible" data pattern. When a plurality of unchanged levels (e.g. binary ones) occur in a bit storage register, a central bit is inverted and thereby marks the channel. The inverted marking bit is detected and eliminated in the receiver end, and/or is used to reset the channel counter when the marking bit is detected on a channel other than the marker channel. U.S. Pat. No. 4,446,555 describes asynchronous time multiplex switching. Time slots containing sample words have different numbers of bits. Information concerning "the rank of the time slot or packet additional channel in the hybrid frame" is added. An indicator bit or bit group distinguishes the sample words from the packets. Not all of the time slots have the same bit capacity and the total number of bits per frame is known.
EP 425,475 discloses a data transmission system pertaining to the recording of an audio signal. The data signal is composed of serial data consisting of bits. A "dummy bit" is inverted in relation to the introductory bit.